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Design File Creation and Templates
There are many wizards defined which can be used to create design files. These wizards can be called from multiple places.
1. File->New
2. Context Sensitive Action from the Navigator
3. Context Sensitive Action from the Project Navigator
Wizard Types
There are many different template types to create different types of files. Currently these are :
1. VHDL Entity
2. VHDL Entity/Architecture
3. VHDL dl Package
4. VHDL Testbench
5. Verilog Module
6. SystemVerilog Interface
7. SystemVerilog Class
8. SystemVerilog Package
9. SystemVerilog Program
File Templates
The templates can all be configured using file templates which are defined in the simplifide configuration directory. These templates are written using freemarker. Simplifide adds attributes to ftl to facilitate file creation.
- FILE_NAME : Name of the file (doesn't contain extension)
- FILE_EXTENSION : Extension of the file
- FILE_PATH : Location of File
- FULL_FILE_NAME : Full Name of File
- DATE : Current Date (See freemarker for date formatting)
- AUTHOR : Author
Related Topics